Verification Engineer
Posted 1 week ago by 1754990895
Negotiable
Outside
Hybrid
USA
Summary: The Verification Engineer role involves participating in the functional verification of complex ASICs and IP cores, particularly in a CPU/GPU development context. Candidates should have extensive experience in verification methodologies and be adept at documenting and executing test plans. The position offers hybrid working arrangements for local candidates and is fully remote for those outside the area. A strong background in computer architecture and programming is essential for success in this role.
Key Responsibilities:
- Participate in the functional verification of complex ASICs and/or IP cores.
- Collaborate with design and verification engineers to understand and verify design functionality.
- Document and execute test plans with directed and constrained-random tests during simulation.
- Adopt evolving verification methodologies for complex SoC designs.
- Work within existing verification infrastructure on active projects.
- Familiarity with hardware modeling and assertion-based verification methods.
Key Skills:
- 5+ years of work experience in verification.
- Strong computer architecture knowledge.
- Experience with DRAM/Memory Controller preferred.
- B.S. in Electrical Engineering or Computing preferred.
- Strong background in C/C++ development in a Linux environment.
- Strong debug skills with tools like Gdb and Valgrind.
- Proficient in Object Oriented programming, STL, and data structures.
- Knowledge of Perl and Makefiles.
- Experience in Verilog/SystemVerilog/SystemC.
- Experience in C/Verilog environment using DPI/PLI.
- Strong analytical skills and attention to detail.
- Excellent written and communication skills.
Salary (Rate): undetermined
City: undetermined
Country: USA
Working Arrangements: hybrid
IR35 Status: outside IR35
Seniority Level: undetermined
Industry: Other
Verification Engineer
12 months -Contract
If the candidate is local to the bay area, we would like them to be hybrid.
If they are in another state 100% remote is fine.
UVM - System Verilog
5+ years work experience
Worked on complex SoC
Strong computer architecture knowledge
Prefer DRAM / Memory Controller experience
B.S. in EE or Computing preferred
JOB DUTIES:
Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation. Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. Be familiar with hardware modeling and/or assertion-based verification methods.
EXPERIENCE AND EDUCATION:
7 or more years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting
Strong background in C/C++ development in a Linux Environment
Strong debug skills and experience with debug tools such as Gdb, Valgrind
Proficient in Object Oriented programming, STL, computer architecture and data structures
Knowledge of Perl and Makefiles
Experience in Verilog/SystemVerilog/SystemC,
Experience in C/Verilog environment using DPI/PLI
Preferred: Strong analytical skills and attention to detail; Excellent written and communication skills