Software Verification Engineer
Posted 2 weeks ago by Hays
Negotiable
Inside
Hybrid
City Of Bristol, England, United Kingdom
Summary: As a Verification Engineer, you will be responsible for developing and executing test plans, methodologies, and software tests, primarily using C and System Verilog/Verilog. The role involves collaboration with project management to plan tasks and schedules while addressing test failures. This position is a 6-month contract with hybrid working arrangements, requiring attendance at the Bristol office two days a week.
Key Responsibilities:
- Write test plans and define test methodologies.
- Develop C based software tests and System Verilog/Verilog testbenches.
- Debug test failures and issues.
- Collaborate with project management on planning tasks and schedules.
- Participate in all stages of verification including requirements collection and documentation.
Key Skills:
- Proven understanding of digital hardware verification languages Verilog/System Verilog HDL.
- Experience in SoC verification using embedded low-level programming including C/C++ and assembly language.
- Knowledge of SoC Verification Flow and strategy.
- 6-20 years of experience in SoC verification.
Salary (Rate): undetermined
City: City Of Bristol
Country: United Kingdom
Working Arrangements: hybrid
IR35 Status: inside IR35
Seniority Level: undetermined
Industry: IT
About the role As a Verification Engineer, you will be writing test plans, defining test methodologies, developing C based software tests, System Verilog/Verilog testbenches and tests, and debugging test failures and issues. You will also be working with project management and leads on planning tasks, schedules, and reporting process. Tell me more, tell me more… Our client is currently looking for a new recruit in joining their please read on! You can also ask our friendly recruitment team any questions you may have about the role, between 8:30am-5:00pm Monday to Friday.
Shifts: Monday – Friday (37.5 hours per week)
The must haves: Proven understanding of digital hardware verification language Verilog/System Verilog HDL. Experience in SoC verification using embedded low-level programme including C/C++ Tests and assembly language. Experienced in SoC verification using. Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, test bench implementation, test case development, documentation, and support Knowledge of SoC Verification Flow and strategy. 6-20 years of experience of SoC verification.
What’s in it for you? – Our client loves to reward their people for doing a great job. This is a 6-month contract. A day rate, in-scope IR35. Competitive pay rate. This role provides a hybrid working access from the comforts of your own home and only going to our state-of-the-art office in the Bristol- 2 days a week.
Next Steps Once you’ve applied, one of our friendly recruitment consultants will give you a call and talk you through the screening process. If your application is successful, you’ll be involved in a live virtual interview with one of our client’s hiring managers to get to know you better. We look forward to speaking to you!