Programmable Logic Design Engineer
Posted Today by TechDigital Corporation
Negotiable
Undetermined
Remote
Remote
Summary: The Programmable Logic Design Engineer is responsible for producing programmable logic requirements from system design specifications and translating these into Simulink models. The role involves developing test cases, generating HDL, and ensuring compliance with quality assurance standards throughout the FPGA development process. Additionally, the engineer will interface with various stakeholders to address project deliverables and troubleshoot complex design issues.
Key Responsibilities:
- Produce programmable logic requirements from system design requirements and specifications.
- Translate programmable logic requirements into Simulink models.
- Apply and configure platform library model elements to meet project-specific requirements.
- Develop test cases and model test harnesses to verify model fulfillment of requirements.
- Generate HDL using HDL Coder and perform co-simulation to verify HDL output against model.
- Ensure successful optimization, synthesis, and place-and-route and subsequently validate equivalence.
- Understand and verify correct tracing from requirements to design artifacts.
- Execute end to end FPGA development with the rigor required of an ASME NQA-1 quality assurance program (or other industry equivalent).
- Perform engineering reviews to identify gaps in the design artifacts and/or their adherence to the planning documents and procedures.
- Execute project deliverables within the estimated budgets and in accordance with schedule milestones.
- Interface with project management and/or customers in providing status and addressing open issues.
- Interface with system designers, hardware engineers, and verification and validation engineers in support of predecessor and successor design lifecycle activities.
- Lead or support troubleshooting of complex FPGA design issues.
Key Skills:
- Design artifacts for FPGAs/ASICs
- MathWorks MATLAB, Simulink, StateFlow, and general model-based systems engineering (MBSE) practices
- Xilinx, Altera and Microsemi technologies and tools design flow
- HDL using HDL Coder
Salary (Rate): £60,000 yearly
City: undetermined
Country: undetermined
Working Arrangements: remote
IR35 Status: undetermined
Seniority Level: undetermined
Industry: IT
Job Description:
• Produce programmable logic requirements from system design requirements and specifications.
• Translate programmable logic requirements into Simulink models.
• Apply and configure platform library model elements to meet project-specific requirements.
• Develop test cases and model test harnesses to verify model fulfillment of requirements.
• Generate HDL using HDL Coder and perform co-simulation to verify HDL output against model.
• Ensure successful optimization, synthesis, and place-and-route and subsequently validate equivalence.
• Understand and verify correct tracing from requirements to design artifacts.
• Execute end to end FPGA development with the rigor required of an ASME NQA-1 quality assurance program (or other industry equivalent).
• Perform engineering reviews to identify gaps in the design artifacts and/or their adherence to the planning documents and procedures.
• Execute project deliverables within the estimated budgets and in accordance with schedule milestones.
• Interface with project management and/or customers in providing status and addressing open issues.
• Interface with system designers, hardware engineers, and verification and validation engineers in support of predecessor and successor design lifecycle activities.
• Lead or support troubleshooting of complex FPGA design issues.
Top Skills:
• design artifacts for FPGAs/ASICs
• MathWorks MATLAB, Simulink, StateFlow, and general model-based systems engineering (MBSE) practices
• Xilinx, Altera and Microsemi technologies and tools design flow
• HDL using HDL Coder