IP Design Engineer
Posted Today by 1759560897
Negotiable
Outside
Remote
USA
Summary: The IP Design Engineer role involves the development, integration, and verification of soft IP for AMD/Xilinx FPGAs, requiring strong digital design expertise. The position is contract-based and allows for remote work, emphasizing collaboration with cross-functional teams. Candidates should possess extensive experience in digital design and RTL development, particularly with Verilog/SystemVerilog. This hands-on role is critical for delivering high-performance IP solutions for advanced FPGA platforms.
Key Responsibilities:
- Develop soft IP for FPGAs using Verilog/SystemVerilog.
- Integrate third-party IP cores into FPGA systems, including creating custom RTL wrappers and managing vendor interfaces.
- Collaborate with verification engineers to debug and validate IP functionality.
- Participate in board bring-up and system-level integration.
- Contribute to the design of high-speed interfaces and video-related IP solutions.
Key Skills:
- 7-12 years of experience in digital design and RTL development.
- Strong proficiency in Verilog and SystemVerilog.
- Solid understanding of digital micro-architecture and system-level design.
- Hands-on experience with AMD/Xilinx FPGAs and Vivado design tools.
- Knowledge of video domain interfaces (DisplayPort, MIPI, HDMI, SDI) preferred.
- Proven track record with high-speed interfaces and IP solutions.
- Ability to analyze system-level performance and optimize for throughput.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
Salary (Rate): £36.00 hourly
City: San Jose
Country: USA
Working Arrangements: remote
IR35 Status: outside IR35
Seniority Level: undetermined
Industry: IT
Position Title: IP Design Engineer
Location: San Jose, CA (Remote)
Clearance Requirements: None
Position Status: Contract
Pay Rate: $45/hr-$50/hr on W2
Position Description:
We are seeking an experienced IP Design Engineer to join our team in San Jose, CA. In this role, you will focus on the development, integration, and verification of soft IP for AMD/Xilinx FPGAs. You will collaborate with cross-functional teams to design custom RTL, integrate third-party IP, and support system-level bring-up. This is a hands-on role requiring strong digital design expertise and the ability to deliver high-performance IP solutions for advanced FPGA platforms.
Key Responsibilities:
Develop soft IP for FPGAs using Verilog/SystemVerilog.
Integrate third-party IP cores into FPGA systems, including creating custom RTL wrappers and managing vendor interfaces.
Collaborate with verification engineers to debug and validate IP functionality.
Participate in board bring-up and system-level integration.
Contribute to the design of high-speed interfaces and video-related IP solutions.
Required Skills/Education:
7 12 years of experience in digital design and RTL development.
Strong proficiency in Verilog and SystemVerilog.
Solid understanding of digital micro-architecture and system-level design.
Hands-on experience with AMD/Xilinx FPGAs and Vivado design tools.
Knowledge of video domain interfaces (DisplayPort, MIPI, HDMI, SDI) preferred.
Proven track record with high-speed interfaces and IP solutions.
Ability to analyze system-level performance and optimize for throughput.
Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or related field.
About Seneca Resources
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