FPGA/IP Design Engineer

Summary: The IP Design Engineer role focuses on the development of soft IP for FPGAs using Verilog/SystemVerilog, integrating third-party IP cores, and collaborating with verification engineers. The position requires extensive experience in digital design and familiarity with AMD/Xilinx FPGA and Vivado tools. The role is fully remote and classified as outside IR35.

Key Responsibilities:

• Soft IP Development for FPGAs using Verilog/SystemVerilog.
• Integrate third-party IP cores into an FPGA system, create custom RTL wrappers, and interface with IP vendors.
• Work with Verification Engineers to verify IP and debug issues.
• Participate in board bring-up as well as system-level integration.

Key Skills:

• 7 to 12 years of experience in digital design.
• RTL coding experience using Verilog and/or System Verilog.
• Strong in digital design, micro architecture, RTL development.
• Working experience of AMD/Xilinx FPGA and Vivado.
• Experience in Video domain (DisplayPort/MIPI/HDMI/SDI) is preferred.
• Detailed understanding and proven track record of designing leading-edge standard and proprietary high-speed interfaces IPs/Solutions.
• Good understanding of system design aspects and its impact on performance and throughput.

Salary (Rate): undetermined

City: undetermined

Country: USA

Working Arrangements: remote

IR35 Status: outside IR35

Seniority Level: undetermined

Industry: IT