Negotiable
Undetermined
Remote
London Area, United Kingdom
Summary: The role of Field-Programmable Gate Arrays Engineer involves working on high-performance IP for next-generation FPGA and Adaptive SoC platforms. The position requires expertise in SystemVerilog RTL, 100Gb Ethernet, PCIe Gen5, and AXI, with a focus on achieving timing closure. The role is fully remote from the UK and emphasizes technical ownership and engineering excellence. Candidates should be familiar with modern development practices, including Git and CI.
Key Responsibilities:
- Develop high-performance IP on FPGA and Adaptive SoC platforms.
- Utilize SystemVerilog RTL for design implementation.
- Work with 100Gb Ethernet, PCIe Gen5, and AXI protocols.
- Ensure designs achieve timing closure efficiently.
- Streamline workflows using Python or Tcl.
- Engage in modern development practices, including Git and CI.
Key Skills:
- Strong SystemVerilog RTL capability.
- Experience with 100Gb Ethernet, PCIe Gen5, and AXI.
- Ability to take designs through to timing closure.
- Familiarity with Vivado and Vitis toolflows.
- Proficiency in Python or Tcl for workflow optimization.
- Understanding of Git and CI practices.
Salary (Rate): undetermined
City: London Area
Country: United Kingdom
Working Arrangements: remote
IR35 Status: undetermined
Seniority Level: undetermined
Industry: IT
I’m getting in touch because I’m supporting a client who are pushing the boundaries of high-performance IP on next generation FPGA and Adaptive SoC platforms and your experience looks highly relevant. They require someone with strong SystemVerilog RTL capability, confident across 100Gb Ethernet, PCIe Gen5 and AXI, and comfortable taking designs through to timing closure without fuss. Vivado and Vitis are central to the toolflow, and there’s real value placed on engineers who streamline their work with Python or Tcl. Modern development practices are in place, Git and CI included. The role is fully remote from the UK with genuine technical ownership and a culture that respects engineering excellence. If this aligns even just slightly with what you’d consider for your next move, would you be open to a brief conversation?