Negotiable
Undetermined
Undetermined
London Area, United Kingdom
Summary: The Layout Engineer role involves developing full-custom Analog/Mixed-Signal/RF layouts while ensuring compliance with design constraints and maintaining layout quality. The position requires collaboration with designers to resolve layout issues and meet project timelines, with a focus on lower technology nodes and RF layout experience. Hands-on experience with specific tools and technologies is essential for success in this role.
Key Responsibilities:
- Develop full-custom Analog/Mixed-Signal/RF layouts at block and top level.
- Ensure compliance with Analog/Mixed-Signal and RF design constraints.
- Maintain layout quality, including matching, symmetry, shielding, isolation, and reliability per design guidelines.
- Perform DRC/LVS/ERC and antenna checks and drive layout closure.
- Collaborate closely with designers to resolve layout issues and meet project timelines.
Key Skills:
- Hands-on experience with Cadence Virtuoso (XL/GXL) for layout design.
- Experience with Calibre for verification.
- Familiarity with PDKs with multi-patterning rules.
- Experience in lower technology nodes, preferably 5nm and below.
- RF layout experience, including handling high-frequency signal paths, guard rings, shielding, and EM coupling considerations.
- Layout of RF blocks such as mixers, LNAs, VCOs, and power amplifiers.
- Exposure to PLL, LNA, VGA, ADC, DAC, SerDes, Bandgap, LDO, etc.
- Programming skills in SKILL for automation.
Salary (Rate): undetermined
City: London Area
Country: United Kingdom
Working Arrangements: undetermined
IR35 Status: undetermined
Seniority Level: undetermined
Industry: Other
Responsibilities: Develop full-custom Analog/Mixed-Signal/RF layouts at block and top level. Ensure compliance with Analog/Mixed-Signal and RF design constraints. Maintain layout quality, including matching, symmetry, shielding, isolation, and reliability per design guidelines. Perform DRC/LVS/ERC and antenna checks and drive layout closure. Collaborate closely with designers to resolve layout issues and meet project timelines.
Mandatory Requirements: Hands-on experience with: Cadence Virtuoso (XL/GXL) for layout design. Calibre for verification. PDKs with multi-patterning rules. Experience in lower technology nodes, preferably 5nm and below. RF layout experience, including: Handling high-frequency signal paths, guard rings, shielding, and EM coupling considerations. Layout of RF blocks such as mixers, LNAs, VCOs, and power amplifiers.
Good to Have: Exposure to PLL, LNA, VGA, ADC, DAC, SerDes, Bandgap, LDO, etc. Programming skills in SKILL for automation.